The present invention relates generally to photolithographic semiconductor processing techniques and more particular to a method and apparatus for depositing and developing a photoresist film.
The patterning of various deposited layers using photolithography techniques are common steps in the formation of today""s integrated circuits. Over the years a variety of photolithographic processes have been developed. One of the more common of these processes includes the deposition of an initial antireflective coating (ARC layer) under a spin-on resist layer. The spin-on resist layer is a light-sensitive material and is therefore referred to as a photoresist layer. After deposition of the photoresist, a photomask (also known simply as a mask) having transparent and opaque regions that embody a desired pattern is used to pattern the photoresist. When the mask is exposed to light (e.g., ultraviolet light), the transparent portions permit the exposure of the photoresist in those regions, but not in the regions where the mask is opaque. The light causes a chemical reaction in exposed portions of the photoresist. A suitable chemical solution, chemical vapor or plasma process is then used to selectively attack (etch away) either the reacted or unreacted portions of the photoresist. This process is known as developing the photoresist. With the remaining photoresist acting as a mask, the underlying layer may then undergo further processing. For example, material may be deposited, the underlying layer may be etched or other processing carried out.
The deposition of such spin-on resist layers is a wet chemical process that has limitations that make the process undesirable for some applications.
Newer photolithography techniques include the deposition of a plasma polymerized methylsilane (PPMS) photoresist layer from a chemical vapor deposition process. PPMS is an amorphous methyl silicon polymer, and PPMS deposition techniques have been previously described in an article by Weidman et al., entitled xe2x80x9cNew Photodefinable Glass Etch Masks for Entirely Dry Photolithography: Plasma Deposited Organosilicon Hydride Polymers,xe2x80x9d published in Applied Physics Letters, vol. 62, no. 4, Jan. 25, 1993, pgs. 372-374; U.S. Pat. No. 5,439,780 to Joshi et al.; and an article by Weidman et al. entitled xe2x80x9cAll Dry Lithography: Applications of Plasma Polymerized Methylsilane as a Single Layer Resist and Silicon Dioxide Precursor,xe2x80x9d published in Journal of Photopolymer Science and Technology, vol. 8, no. 4, (1995), pgs. 679-686. Additionally, a commercially viable PPMS photolithography technique in which a deposited PPMS film has good stability, high photosensitivity and a high deposition rate is described in U.S. Ser. No. 08/745,565, filed Nov. 8, 1996, entitled xe2x80x9cMethod and Apparatus for Depositing Deep UV Photoresist Film,xe2x80x9d and having Timothy Weidman and Dian Sugiarto listed as co-inventors. The Ser. No. 08/745,565 application is assigned to Applied Materials, an applicant for the present patent, and is hereby incorporated by reference in its entirety.
As described in these references, a PPMS film having an amorphous organosilicon hydride network structure is deposited by plasma polymerization of a methylsilane precursor gas. When the PPMS film is exposed to deep UV radiation in the presence of an oxidant such as ambient air, exposed portions of the PPMS film undergo photo-oxidation to form a glass-like, siloxane network material, plasma polymerized methylsilicon oxide (PPMSO). The resulting patterns can be developed to provide either negative tone or positive tone patterns. Negative tone patterns are generally formed using a chlorine-based plasma etch. Positive tone patterns can be formed using an HF vapor or buffered oxide etch. In either case, the developed pattern may optionally be further oxidized and annealed to convert the remaining material to a hard oxide suitable for further processing. Such PPMS photolithography techniques are advantageous in that the deposition, development, patterning, and etching steps may all be performed in the gas phase, i.e., using dry plasma processing techniques, providing very high resolution.
The process described in the Ser. No. 08/745,565 application described above is useful for a variety of photolithography applications. Despite this, improvements to these known PPMS deposition processes are desirable.
The present invention provides an improved photolithography process that enables definition of patterns that have improved line roughness, resolution and critical dimension uniformity and control as compared to previously known PPMS processes.
In one embodiment, the present invention provides a process for patterning a feature on a substrate using a plasma polymerized methylsilane (PPMS) photoresist layer or similar organosilicon film. The process includes the step of depositing a PPMS film having upper and lower strata such that the upper stratum is more photosensitive to ultraviolet radiation than is the lower stratum. In one version of this embodiment, the upper and lower strata are formed in a multistep deposition process that, preferably, takes place in a single deposition chamber. In another version of this embodiment, the upper and lower strata are formed by a process in which deposition parameters are modified to deposit a PPMS layer having a photosensitivity gradient between the upper and lower strata. In still another version of this embodiment, various intermediate strata are formed. Preferably, each intermediate stratum has a photosensitivity that is higher than the stratum directly beneath it.
In another embodiment, the present invention provides a multistep process for etching a PPMS layer that increases the etch selectivity (the etch ratio of an unoxidized PPMS film relative to an oxidized PPMSO film) from an initial low etch selectivity to a higher etch selectivity at a later stage of the etching process. In one currently preferred version of this embodiment, the etch selectivity used during a first etching step of the process is about 4:1 or less and the etch selectivity used during a second etching step, subsequent to the first step, is about 5:1 or more. In an even more preferred version of this embodiment, the etch selectivity of the first step is between 2-3:1 and the etch selectivity of the second step is greater than 5:1. Optionally, a third etching step, performed between the first and second etching steps, may be employed where the etch selectivity is between 3-4:1. In another version of this embodiment, the etch selectivity is varied along a gradient, e.g., linearly, throughout the etching process from a low etch selectivity to a higher etch selectivity.
These and other embodiments of the present invention, as well as its advantages and features, are described in more detail in conjunction with the text below and attached figures.